The present invention relates generally to semiconductor packages, and more specifically, to semiconductor packages having optimized wire bond positioning.
In semiconductor packaging, wire bonds may be used to provide electrical connections from the semiconductor die to the package substrate. For example, wire bonds may be used to provide electrical connections between bond pads of the semiconductor die to bond posts on the package substrate. However, as semiconductor technologies evolve, the number of electrical connections needed between the semiconductor die and package substrate increases, while the size of semiconductor die and packages continues to decrease. Thus, current wire bonded semiconductor die with one or more rows of pads along a periphery of the die become pad-limited as more connections are required. Once pad-limited, further reductions in die size are not possible without reducing the number of connections. For example, once pad-limited, additional ground and power pads may be sacrificed, which may harm electrical performance. Furthermore, in current wire bonding technologies, the wires are kept as far apart as possible to prevent shorting. This also results in longer wires with increased inductance. Therefore, a need exists for a semiconductor package having improved wire bond positioning which allows for reduced semiconductor die sizes and improved electrical performance.